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Huawei's Wang Tao: Building the AI compute foundation takes far more than one good chip
At this year's Huawei Connect, rotating chairman Wang Tao unveiled the Ascend 960 and its 960 supernode along with a one-generation-per-year roadmap running to Ascend 970 in 2028 and Ascend 980 in 2029. Huawei also introduced the industry's first supernode built on near-package optics, and said its CANN software ecosystem has crossed an inflection point as it positions itself as a compute-foundation supplier.
At this year's Huawei Connect, the company's rotating chairman Wang Tao laid out a fuller roadmap for its AI infrastructure, built around the Ascend 960 and its 960 supernode, and put the chips that follow on the table: Ascend 970 in 2028 and Ascend 980 in 2029, on a cadence of one generation per year for the next several years.
On silicon, Huawei says it is moving faster than planned. According to QbitAI, the Ascend 960DT is ready three quarters ahead of schedule, with per-chip compute doubled: 2 PFLOPS FP8 and 4 PFLOPS FP4, up to 288GB of HBM at 9.6TB/s. The matching 960 supernode scales to 4,096 NPU cards, up to 8 EFLOPS FP8 and more than 1PB of HBM.
Wang insists the story is not a single faster chip. In a post-keynote interview with QbitAI he said the 960 silicon had already been under lab testing for months: “A chip typically takes three years from project start to productization; we only announce once the product has been repeatedly tested in the lab and has a firm delivery date.”
The bigger shift is happening around the chip. Huawei is betting on scale compute: 384 cards for the 910C, 1,024 for the 950 and 4,096 for the 960, with unified memory addressing across physical nodes so many NPUs behave more like one logical computer. Wang said simulations show that, with the same 100,000-card cluster, a cluster built from 4,096-card supernodes can lift MFU by 2.75x compared with traditional eight-card servers.
The hardware innovation behind that is NPO, or near-package optics. The Ascend 960 is the industry's first supernode to use NPO optical engines, shipped as Huawei's Hi-ONE engine: 36 lanes of 200G per engine, 7.2Tbps of total capacity, with the light source built in. On a panel, Wang summed up Hi-ONE's lead as “three firsts”: first to commercialize at scale, the largest bandwidth, and the only one with an integrated light source.
Huawei deliberately stopped short of CPO, or co-packaged optics. Wang's explanation was concrete: putting the optical engine next to the main chip means a broken engine scraps the whole chip, hurting availability and raising failure costs while demanding more from packaging vendors, whereas NPO's total cost of ownership is at least 40% lower today. He left the door open, saying Huawei could move to CPO if it solves reliability and yield. Per the company, the 960 supernode uses about 5,500 Hi-ONE engines to replace roughly 48,000 800G optical modules, cutting power by more than 550kW, doubling time between failures and reaching 99.8% availability.
Software has to keep pace. CANN now runs as a regularly operated open-source community with more than 5,200 monthly active developers, 61% of them external, and Ascend has entered PyTorch's official support path so developers can get help directly through the PyTorch community. Wang stayed restrained: “After eight years of effort, today we only dare say that the CANN ecosystem has crossed the inflection point.” He added that Huawei wants to move adaptation earlier, working with model makers while models are still in pre-training.
Behind this is a clear division of labor. Wang said plainly that “Huawei's core mission is to build the compute foundation.” Pangu will keep serving Huawei's own product intelligence, but the company does not intend to compete with partners at every layer; the Lingqu interconnect protocol is open and CANN code keeps shipping as open source, with more R&D going into chips, supernodes and the compute base.
The choice also carries the imprint of hard constraints. Wang noted that China's most advanced manufacturing processes have not fully broken through, so Huawei needs an innovation path that still meets domestic demand for AI training, inference and industry applications, which is why it pushes single-chip performance while pouring resources into supernodes, optical interconnect and systems engineering. Three things to watch: whether the one-generation-per-year cadence holds, whether natively trained Ascend models appear at scale, and whether Huawei can actually deliver the compute it says should be within reach.
Why it matters
The announcement moves the AI compute race from single-chip specifications toward system-level engineering — supernodes, optical interconnect and software ecosystems — and defines Huawei as a compute-foundation supplier rather than a full-stack competitor. For Chinese model makers, earlier adaptation work and continued CANN open sourcing mean lower migration and optimization costs.
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