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NVIDIA Taps Vera CPU to Accelerate Next-Generation Chip Design with Cadence and Synopsys

NVIDIA announced it is collaborating with Cadence and Synopsys to optimize electronic design automation applications for its Vera CPU. Early tests show up to 1.5x performance gains on key verification and simulation workloads.

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NVIDIA 携手 Cadence 与 Synopsys,用 Vera CPU 加速下一代芯片设计
Image source: blogs.nvidia.com

NVIDIA announced it is deploying its custom Vera CPU across electronic design automation workflows used to develop next-generation chips, collaborating with industry leaders Cadence and Synopsys to optimize critical EDA applications for the new processor architecture.

Chip design complexity continues to grow as engineering teams develop increasingly sophisticated CPUs, GPUs, and AI systems. Engineers spend years validating behavior, identifying corner cases, and refining designs through thousands of iterations before a chip reaches manufacturing.

Early testing on production-class workflows shows promising results. Both Cadence Jasper, a formal verification platform, and Synopsys VCS, a high-performance functional verification solution, demonstrated up to 1.5x higher performance on selected workloads using the same number of cores. Beyond benchmarks, NVIDIA is working closely with both companies on application profiling, software optimization, and system-level tuning.

The Vera CPU combines 88 custom NVIDIA Olympus cores with a high-efficiency LPDDR5X memory subsystem and second-generation NVIDIA Scalable Coherent Fabric, designed to deliver strong per-core performance, high memory bandwidth, and consistent low latency for demanding engineering applications.

These capabilities matter because several critical EDA workloads remain heavily dependent on CPU performance. Faster execution shortens individual verification runs, while greater throughput lets engineers evaluate more design alternatives within the same development window.

NVIDIA is deploying Vera throughout its own engineering workflows. This reflects a broader strategy: accelerate each workload with the compute architecture best suited to the task. In EDA, GPUs and AI continue to speed many algorithms, but high-performance CPUs remain essential for critical simulation and verification tasks.

Looking ahead, NVIDIA plans to build on Vera with the next-generation Rosa CPU, powered by the NVIDIA Rigel core. By using NVIDIA CPUs to help design future NVIDIA CPUs and GPUs, the company is creating a continuous feedback loop between silicon design, software optimization, and systems engineering.

Why it matters

NVIDIA's closed-loop strategy of using its own CPUs to design even better chips could create a competitive moat in the semiconductor industry, where EDA toolchain optimization increasingly determines the pace of innovation.

NVIDIAVeraEDAChip DesignCadenceSynopsys
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